Physical Design Intern - Master's Degree

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Descrizione

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The team develops the physical implementation of leading AI infrastructure and ASIC chips, transforming RTL designs into manufacturing-ready GDS. And drive the complete RTL-to-GDS flow, including floorplanning, placement, clock tree synthesis, routing, timing closure, and physical verification, enabling next-generation high-performance AI computing solutions. As a member of Marvell central physical design team, you will participate in next-generation physical design implementation and verification activities of complex SOC designs. What You Can Expect Internship assignments include: Block-level layout implementation and timing closure Static Timing/Crosstalk Analysis and timing closure Synthesis/Physical Synthesis Power/IR/EM analysis Physical verification (LVS/DRC/ERC/ANT) ECO implementation What We're Looking For Currently pursuing a Master’s Degree in Electronic Engineering, Microelectronics, or related

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