ASIC Formal Verification Engineer, […] Cloud corporate_fare […] place Sunnyvale, CA, USA bar_chart Mid Mid Experience driving progress, solving problems, and mentoring more junior team members; deeper expertise and applied knowledge within relevant area. […] | Sunnyvale, CA, USA
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. 4 years of experience with formal and design verification. Experience with System
Verilog or Verilog. Experience working with one or more formal verification tools (e.g., Jasper, VC Formal, Questa Formal, 360-DV). Learn more share Share ASIC Formal Verification Engineer, […] Cloud link Copy link email Email a friend