(Fastwater Staffing) PCIe Characterization Engineer - Palo Alto, CA (On-site)

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Location: Palo Alto, CA (On-site) Job Type: Contract Job Overview We are seeking an experienced PCIe Characterization Engineer to perform post-silicon electrical characterization and validation of high-speed SerDes PHYs. This role involves hands-on laboratory testing, electrical measurement, signal integrity analysis, and debugging of high-speed interfaces across PCIe, Ethernet, UFS, and LPDDR5 technologies. The ideal candidate has a strong background in post-silicon characterization or high-speed I/O (HSIO) validation, with practical experience using advanced lab equipment and developing Python scripts for test automation. Key Responsibilities Perform post-silicon electrical characterization of high-speed SerDes PHYs and memory interfaces. Conduct eye diagram, jitter, bit error rate (BER), and S-parameter measurements. Operate high-speed oscilloscopes, bit error rate testers (BERT), vector network analyzers (VNA), and TDR equipment. Analyze schematics and PCB layouts to identify signal integrity issues and support electrical debugging. Perform hands-on troubleshooting and debug at the probe point to isolate and resolve hardware-level issues. Develop and maintain Python scripts for laboratory test automation, data collection, and analysis. Analyze characterization results, document findings, and collaborate with cross-functional engineering teams to improve interface performance. Support validation activities for high-speed interfaces, including PCIe, Ethernet, UFS, and LPDDR

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