AI Infrastructure Engineer

About […] The biggest bottleneck in AI inference today is memory. Chips can compute faster than they can be fed data, a problem known as the memory wall, and […] is building the solution. Our approach spans the full stack, from a proprietary memory management library down to X-Mem™, our Memory Processing Unit (MPU) silicon.

[…] was co-founded by researchers in optical networking and ML systems. We’re a small team in Cambridge, MA and Santa Clara, CA, and we’re looking for people who want to own hard problems end to end and help shape where the company goes next. About the Role Serving frontier LLMs efficiently at scale is a moving target: every new model and workload reshuffles the tradeoffs across parallelism, batching, KV caching, and scheduling.

You’ll own […]’s inference-serving stack end to end, from tuning vLLM, SG

Lang, and TensorRT-LLM to architecting distributed serving with NVIDIA Dynamo (prefill/decode disaggregation, KV-cache-aware routing). Working directly with our hardware and systems engineers, you’ll build the benchmarks and drive the optimizations that take new models from research to production. This role will be performed onsite from one of our offices in Santa Clara, CA or Boston, MA (relocation assistance available).

The Opportunity Impact: AI is advancing faster than the infrastructure underneath it. We’re working at that layer, unlocking more capability from every GPU while dramatically improving efficiency. The work you do here comp