Microarchitect and RTL Designer - Compute

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Description

What MatX is Building MatX's mission is to make the world’s best AI models run as efficiently as allowed by physics, bringing the world years ahead in AI quality and availability. What Compute Means The compute subsystem implements all of the core numerics and the associated control and data paths required to realize meaningful hardware acceleration of our target ML workloads. In this role you own the micro-architecture and RTL for blocks within it, end to end. What You'll Do Here: Contribute to MatX's silicon architecture-to-design methodology with a scalable solution across blocks, subsystems, and fullchip design Own entire subsystems or subsets and/or chip-level silicon design deliverables from micro-architecture to sign-off-ready design Plan and drive intermediate and sign-off reviews on micro-architecture and design specifications, execution progress, and area and timing closure toward various silicon milestones including design freeze and tapeout Work closely with the verification, DFT, and physical design co-owners of the subsystem/block in question and deliver best-in-class performance-power-area results Who You Are: At least 5 years of silicon design experience Tape-out experience — you have taped out chips, demonstrating end-to-end ownership of a design through multiple generations Ability and willingness to ramp on Bluespec — a functionally-rooted HDL used for our designs. g. Haskell), is a plu

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