Description
Accountabilities:
- You will own key elements of the embedded firmware architecture, ensuring that management firmware securely provisions, initializes, monitors, and updates on-chip acceleration engines. You will also establish engineering standards and guide technical execution across the platform. Firmware Architecture and Development: Architect, design, and implement bare-metal C firmware running on a RISC-V management core to provision, boot, and supervise arrays of on-chip acceleration engines.
- Secure Firmware Loading: Develop and maintain the secure firmware-loading pipeline, including fetching images from flash, coordinating authentication through hardware root-of-trust mechanisms, and distributing verified images into individual engines' local memories using on-chip fan-out and DMA hardware.
- Engine Initialization and Health Monitoring: Implement per-engine bring-up, reset sequencing, and health validation through control and status registers, with robust timeout handling, error recovery, and enforced security invariants.
- Multi-Engine and Multi-Die Support: Scale firmware distribution and initialization across numerous engines and multiple dies, supporting runtime rebooting and in-field firmware updates.
- Hardware/Software Interface Definition: Define and maintain hardware/software contracts with ASIC and RTL teams using a datamodel-first workflow and tools such as SystemRDL, Kaitai, and YAML-based code generation.
- Firmware Validation and Testing: Validate fi
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