ASIC Engineer, Implementation

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Description

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure behind Meta's AI, data center, and next-generation computing platforms. As a Staff ASIC Implementation Engineer, you will drive the physical implementation and synthesis of complex custom ASICs from RTL to tape-out, shaping the architectural and methodological decisions that define Meta's silicon roadmap. In this role, you will own end-to-end implementation flows, establish best practices across teams, and partner with design, verification, and physical design teams to deliver high-performance, power-efficient silicon at scale. Lead end-to-end ASIC implementation flows, including logic synthesis, static timing analysis, formal verification, and design-for-test integration for complex custom silicon designs Define and own synthesis and implementation methodology, establishing reusable flows and constraints that scale across multiple chip projects Drive timing closure strategies across hierarchical design partitions, resolving critical path bottlenecks through collaboration with RTL designers and physical design engineers Develop and maintain synthesis scripts, constraint files, and automation infrastructure to improve implementation quality and reduce iteration cycles Generate SOC floorplans at the chip level, subsystem level, block level and enable block implementation owners to execute on synthesis & physical design Perform top-level logical and physical connectivity an

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