ASIC Formal Verification Engineer I, Annapurna Labs

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Description

In Annapurna Labs we are at the forefront of hardware co-design not just in Amazon Web Services (AWS) but across the industry. The work we do is cutting-edge and internet-scale while also being deeply important to our customers. We design and build every component of our hardware and software to come together into products that our customers use for accelerated computing: either Machine Learning acceleration, or FPGA acceleration. We get our hands dirty, from creating our own silicon, pushing the electrons in the right direction, ensuring our hardware is functional and healthy, and managing the full lifecycle of our systems at the huge scale and complexity of AWS. If you're interested in "building a complete product" from inception to delighted customers, Annapurna is a fantastic choice.<br/>As a member of the Machine Learning Acceleration team you will be responsible for defining and checking the specification of critical hardware modules using formal methods and industrial model checkers.<br/>You will be a part of a world class pre-silicon hardware design team. The job entails understanding requirements of specific hardware blocks and writing functional descriptions of correct behavior. Specifications are written in hardware description languages like Verilog and System Verilog Assertions (SVA). Using industrial model checkers you will then learn techniques for proving the hardware being designed matches the modeled specification. Advances proof techniques, such as modeling

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