Digital Design Engineer (Mid-Senior Level)

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Description

Movandi has made a big impact on 5G in a short amount of time, from foundational research and innovative modular, high-efficiency mmWave system design to the introduction of our BeamXR 5G system that delivers measurable improvements in performance, coverage, and latency. Now more than ever, 5G — supported by Movandi technology — is becoming an integral part of the telecommunications landscape. At Movandi we work as a team of sharp engineers who thrive on hard problems. If you want your work to have a direct impact on the future of 5G connectivity, this is the role for you. About the Role We're looking for an experienced Digital Design Engineer to take ownership of complex digital subsystems within our hardware team. You'll lead RTL design and verification efforts for FPGA and ASIC targets, drive microarchitecture decisions, and serve as a technical reference for the broader team. You'll work closely with hardware, embedded software and verification engineers to ship robust, high-performance designs on time. What You'll Do RTL ownership: Architect and implement synthesizable RTL in VHDL or SystemVerilog for FPGA and ASIC targets, with a focus on performance, reusability, and long-term maintainability. Microarchitecture: Contribute to and lead block-level design decisions; pipelining strategy, clock domain partitioning, power/performance/area trade-offs, and document them clearly for design reviews. Verification leadership: Define and execute verification strategies using Syste

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