Junior Emulation Engineer

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Description

Celero Communications is a fast-growing semiconductor startup developing high-performance coherent DSP technology for next-generation AI infrastructure. We recently announced a $275M Series C following the validation of the industry’s first 2nm coherent DSP silicon. Bloomberg also reported that Alphabet’s CapitalG has backed Celero at a $3B valuation. As we continue to grow, we’re hiring exceptional talent across the United States, Canada, and Argentina for a variety of exciting opportunities. We are seeking a motivated Junior Emulation Engineer to join our pre-silicon verification team. This is an excellent opportunity for recent graduates and early-career engineers to build hands-on experience bringing up complex SoC designs on hardware emulation platforms. In this role, you will help compile, run, and debug RTL on emulation systems, supporting early validation of hardware and firmware ahead of tape-out. You will work closely with RTL design, verification, and firmware teams, learn from senior engineers, and grow into an independent contributor on next-generation semiconductor products. Key Responsibilities Emulation Bring-Up: Support compilation, partitioning, and bring-up of RTL designs on hardware emulation platforms. Environment Support: Assist in building and maintaining emulation environments, including testbenches, transactors, and run configurations. Debug & Triage: Analyze waveforms, logs, and traces to isolate failures, and work with RTL and verification engineers

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