Silicon Packaging Technology Engineer

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Description

Reality Labs is delivering Meta's vision through AI-powered wearable products. The compute performance, power efficiency, and form factor requirements demand custom silicon with cutting-edge packaging solutions. We are seeking a Silicon Packaging Technology Engineer to join our team and drive advanced packaging technology from concept through productization for next-generation consumer hardware. Lead development and roadmap creation for advanced and disruptive packaging technologies (hybrid bonding, TSV, fan-out, SiP, flip chip, SMT, solder ball attach, and assembly processes) Establish and manage relationships with foundries, OSATs, substrate suppliers, and material suppliers to support package development activities Influence and align OSAT and foundry partners' roadmaps with Meta's custom silicon packaging roadmap Collaborate cross-functionally with internal teams (silicon design, architecture, system, thermal, mechanical) and external partners (design houses, OSATs, substrate vendors) to ensure manufacturability, integration, and reliability Support test vehicle (TV) design, process feasibility, simulation, and design rule/DFM checks with emphasis on thermo-mechanical reliability Drive Design of Experiments (DOEs) for initial builds, product qualification, and sustaining activities Lead triage efforts for unexpected inline process, equipment, and quality issues; drive root cause failure analysis (FA) and corrective actions with partners Evaluate and address chip-package interaction (CPI) effects, board-level reliability (BLR), and component-level reliability (CLR) through simulation, testing, and data analysis Track technology gaps, reliability risks, and yield issues; compile and maintain POR, TOR, FMEA, and related KPIs Stay updated on advanced packaging technologies and market trends and identify emerging technologies Travel both domestically and internationally up to 10% of the time

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